1. Technology Field
The present invention generally relates to a data writing method, and more particularly, to a data writing method which can shorten a response time, and a flash memory control circuit and a flash memory storage system using the same.
2. Description of Related Art
Along with the widespread of digital cameras, cell phones, and MP3 in recently years, the consumers' demand to storage media has increased drastically. Flash memory is one of the most adaptable memories for such battery-powered portable products due to its characteristics such as data non-volatility, low power consumption, small volume, and non-mechanical structure. A solid state drive (SSD) is a storage device that uses a NAND flash memory as its storage medium.
Generally speaking, a flash memory module in a flash memory storage device has a plurality of physical blocks, and these physical blocks are logically grouped by a flash memory controller of the flash memory storage device into a system area, a data area, a spare area, and a replacement area. The physical blocks in the system area are used to store important information related to the flash memory storage device, and the physical blocks in the replacement area are used to replace damaged physical blocks in the data area or the spare area. Thus, a host system cannot access the physical blocks in the system area or the replacement area in general access states. The physical blocks in the data area are used to store valid data written by write commands, and the physical blocks in the spare area are used to substitute the physical blocks in the data area when the write commands are executed. To be specific, when a flash memory storage device receives a write command from a host system and accordingly is about to update (or write) data in a physical block in the data area, the flash memory storage device first selects a physical block from the spare area, then writes the old valid data in the physical block to be updated in the data area and the new data into the physical block selected from the spare area, logically links the physical block containing the new data to the data area, and eventually erases the physical block to be updated in the data area and logically links it to the spare area. In order to allow the host system to successfully access the physical blocks that are alternatively used to store data described above, the flash memory storage device provides logical blocks to the host system. Namely, the flash memory storage device reflects the substitution of the physical blocks by recording and updating the mapping relations between the logical blocks and the physical blocks in the data area in a logical address-physical address mapping table. Thus, the host system simply accesses a logical block while the flash memory storage device accesses the corresponding physical block according to the logical address-physical address mapping table.
Thanks to the advancement in the manufacturing process of flash memories and to increase the capacity of storage media, the capacities of each programming unit and each erasing unit have been designed larger and larger. As a result, it takes a longer time to move the valid data in a physical block. However, such a flash memory having a larger erasing unit may become inapplicable to a flash memory storage device (for example, a SD memory card) because the response time of a write command may exceed the specified response time of the flash memory storage device. Accordingly, it is needed to short the response time of each write command executed in a flash memory storage device.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.